Panasonic and Renesas jointly developed 32nm process node SoC

Began in 1998 in a joint process technology development based on the successful cooperation, Panasonic Corporation and TDA5737M datasheet and Renesas Technology Corp. has begun to develop next-generation 32nm process technology node, the basic SoC. The two companies confident of their 32nm node transistor technology and TDA5737M price and other advances can be used in mass production soon.

Can be expected, as a result of the miniaturization of their design principles, 32nm node SoC to achieve lower costs and TDA5737M suppliers and improve performance, but there are still many technical issues need to be solved. In particular, must adopt new materials and develop new technologies to break through barriers to further integration, such as transistor gate leakage and inconsistent electrical characteristic problems, which are often a problem of existing technology. New materials is technically difficult; in 32nm node transistor performance to achieve an acceptable technical challenges than its previous generation process nodes is more difficult to overcome.

To address these challenges, the new 32nmSoC process using a newly developed metal / high dielectric constant (high-k) gate stack (gatestack) Structure transistor technology and interconnect technology, using a new type of ultra-low dielectric constant (ultra-low-k) material. In order to achieve the 32nm node using complementary metal-insulator semiconductor (CMIS) technology, device, or a complementary metal oxide semiconductor (CMOS), under optimized conditions at the atomic level of metal / high-k gate stack structure of the transistor applications ultra-thin film coatings (caplayer). This will help to use a layer of silicon oxide film as the gate insulation layer to achieve the common development of the transistor structure. Use of cover shows improvement in the actual use of the transistor reliability and inhibit the distribution of electrical characteristics between transistors, thereby helping to large-scale operation of the circuit.

Early before the establishment of Renesas Technology, the two partners have already committed to co-develop next-generation SoC technology. So far, their joint development work has gained remarkable achievements. In 2001 they developed a 130nmDRAM synthesis process developed 90nmSoC process in 2002, 2004 is the 90nmDRAM synthesis, process 2005 is 65nmSoC 2007 is 45nmSoC process.

Latest development of the new 32nm manufacturing technology will be applied to advanced mobile and digital home appliance products, SoC.

Based on their accumulated technology expertise and thus brings new progress, and years of successful cooperation, Panasonic and Renesas Technology hope to continue efficiently developing the advanced process technology, which can quickly start their own production.

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